An embodiment of the present invention relates generally to a semiconductor device and a method of fabricating the same, and more particularly, to a semiconductor device having a wall oxide on a semiconductor substrate and a method of fabricating the same.
A typical semiconductor memory device includes a cell region having a plurality of memory cells. When increasing the capacity of a semiconductor memory device, i.e., incrementing memory size, additional patterns are required. However, the demand for miniaturization requires that the size of the cell region be reduced or at least limited. Accordingly, the cell region must be highly integrated to secure the desired memory size, thus requiring more patterns to be formed within the limited available space of the cell region. Thus, the critical dimension (e.g., line width) of such a pattern is miniaturized so as to reduce the space it occupies. In order to form a pattern having a minute critical dimension, the lithography process for forming such patterns must be augmented.
In a typical lithography process, a photoresist is first coated on the upper side of a substrate. An exposure process is performed on the photoresist using an exposure mask to define a micro-pattern by making use of a light source having a wavelength length of 365 nm, 248 nm, 193 nm, 153 nm or the like. Thereafter, a photoresist pattern, which defines a micro-pattern, is formed by using a development process. The resolution of such a lithographic process is determined according to the wavelength (λ) of the light source and the numerical aperture (NA). Generally, resolution is a measure of the ability to separate closely spaced features, and the resolution limit (R) in a lithography process is given by the following equation: R=k1×λ/NA.
In the above equation, K1 is a process constant (also known as the process factor). In order to improve the resolution limit (R), the wavelength should be shorter, the NA should be higher, and the K1 constant should be smaller. The K1 constant has a physical limit, and it is nearly impossible to effectively reduce the value by normal methods. Therefore, it is difficult to improve resolution by reducing the process constant K1. In order to use a shorter wavelength, it would be necessary to develop a photoresist material having a high reactivity to a short wavelength along with an exposure apparatus for applying the short wavelength; thereby making it difficult to form a micro-pattern having a reduced critical dimension by using a shorter wavelength.
Double patterning technology (DPT) is a lithography technique in which minute patterns can be formed using tools already available. In DPT, a pattern is separated into two masks in order to achieve high resolution. Another technology is the spacer patterning technology (SPT), which is similar to the double patterning process, but does not require double exposure or double patterning.